This invention relates to memory resource sharing and communication between components of a device.
Modern computing devices are comprised of many independently intelligent components that implement a variety of discrete functions and interact within the overall computing device. For example, an application processor and a graphics processor interact to provide content to the system display. Each independent intelligent component typically has a variable degree of intelligence and component specific local resources available, such as memory resources.
It is known to employ a bus architecture to allow the transfer of data between integrated circuits in a computing device. For memory transfer operations, a direct memory access (DMA) controller may be used to offload the supervision of the bus and memory transfer operations from the central processor unit (CPU), allowing the CPU to perform other functions while memory transfers are ongoing.
As computing devices become more complex and memory resources in the devices become more diffuse, efficient communication methods between components for sharing memory resources would be desirable.